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  • SharkyForums.Com - Print: 870 chipset...

    870 chipset...
    By Xcom_Cheetah July 04, 2001, 02:15 PM

    can anybody give me an idea how it will work for both 32 bit and 64 bit processors... or wot are the major hurdles in having a same chipset for both type of processor..??

    By Moridin July 04, 2001, 04:12 PM

    My understanding is that the two chips use a different northbridge, though I have to admit I do not quite understand this. Wouldn't that make the chipsets different?

    By naukkis July 04, 2001, 07:11 PM

    There is no need to use different northbridges if IA32 and IA64 will use same front side bus. For example AMD Athlon and Alpha use same FSB and they could use same chipsets, and there could even have been possibility to use both on the same motherboard.

    By Moridin July 04, 2001, 07:17 PM

    quote:Originally posted by naukkis:
    There is no need to use different northbridges if IA32 and IA64 will use same front side bus. For example AMD Athlon and Alpha use same FSB and they could use same chipsets, and there could even have been possibility to use both on the same motherboard.

    Apparently they do not use the same FSB.

    By Marsolin July 05, 2001, 03:08 PM

    Itanium and Xeon use different bus protocols, and because of that the chipset set must use a different northbridge, as was suggested above. The reason that it can all be considered part of the same chipset is that Intel doesn't consider just the northbridge a chipset. For example, the 850 chipset includes the 850 MCH (Memory Controller Hub), IOH2 (I/O Controller Hub 2), and FWH (Firmware Hub, actually the flash memory that holds the BIOS).

    870 has two different SNC's (Serial Node Controllers), which are its northbridge equivalents. One works with McKinley and the other with Gallatin.

    By Moridin July 05, 2001, 03:25 PM

    quote:Originally posted by Marsolin:
    Itanium and Xeon use different bus protocols, and because of that the chipset set must use a different northbridge, as was suggested above. The reason that it can all be considered part of the same chipset is that Intel doesn't consider just the northbridge a chipset. For example, the 850 chipset includes the 850 MCH (Memory Controller Hub), IOH2 (I/O Controller Hub 2), and FWH (Firmware Hub, actually the flash memory that holds the BIOS).

    870 has two different SNC's (Serial Node Controllers), which are its northbridge equivalents. One works with McKinley and the other with Gallatin.

    Thanks for the more complete explanation.

    By Arcadian July 06, 2001, 01:20 PM

    quote:Originally posted by Moridin:
    My understanding is that the two chips use a different northbridge, though I have to admit I do not quite understand this. Wouldn't that make the chipsets different?

    nVidia's nForce uses the n420 and n220 northbridges. They also use two different south bridges for a combination of 4 distinct configurations. It's all considered the nForce chipset, however.

    The i870 works in the same way. One component will differ to support two different FSB protocols, and the rest of the system stays the same.

    By Arcadian July 06, 2001, 01:21 PM

    quote:Originally posted by Marsolin:
    870 has two different SNC's (Serial Node Controllers), which are its northbridge equivalents. One works with McKinley and the other with Gallatin.

    SNC = Scalable Node Controller.

    By Xcom_Cheetah July 06, 2001, 01:44 PM

    quote:Originally posted by Arcadian:
    nVidia's nForce uses the n420 and n220 northbridges. They also use two different south bridges for a combination of 4 distinct configurations. It's all considered the nForce chipset, however.

    The i870 works in the same way. One component will differ to support two different FSB protocols, and the rest of the system stays the same.

    How the Processor will know that through which protocol it has to communicate.. or u have to set it manually..?? secondly are the future processor of intel are going to have same pin count..?? and lastly... doesn;t it increase the Power consumption of the Motherboard... with xtra chipset..??

    By Moridin July 06, 2001, 02:01 PM

    quote:Originally posted by Xcom_Cheetah:
    How the Processor will know that through which protocol it has to communicate.. or u have to set it manually..?? secondly are the future processor of intel are going to have same pin count..?? and lastly... doesn;t it increase the Power consumption of the Motherboard... with xtra chipset..??

    The bus protocol is part of the processor design. It can only communicate with the chipset using a single protocol. For example the Athlon uses the EV6 protocol while the PIII uses the GTL+ protocol. This is why you need a different northbridge for each processor; the northbridge has to match the FSB used by the processor.

    The number of pins used for the FSB will not usually change. If it does you would normally need a different chipset to accommodate the change. I suppose it would be possible to design a chipset that had the ability to support more address lines. For example the PIII Xeon processor has four more address pins than PIII. It may be possible to design a chipset that supported both chips, but I don't know for sure.

    Usually extra pins added to a processor are power and ground pins. This is apparently the case in the new P4 socket.

    By Moridin July 06, 2001, 02:26 PM

    quote:Originally posted by Arcadian:
    nVidia's nForce uses the n420 and n220 northbridges. They also use two different south bridges for a combination of 4 distinct configurations. It's all considered the nForce chipset, however.

    So you can have systems with completely different nortbridges and southbridges that are still considered the same chipset. This is actually a little funny since these are the two main parts of a chipset.

    I guess I can kind of see the logic though. From a system level you can treat both parts as black boxes where you do not care what goes on inside. All you care about is how they interact with each other, and that doesn't change.

    By Marsolin July 06, 2001, 04:13 PM

    quote:Originally posted by Arcadian:
    SNC = Scalable Node Controller.

    Oops. I always mess that one up. :-) I must have all of these serial interfaces on the brain.

    By Arcadian July 06, 2001, 06:37 PM

    quote:Originally posted by Xcom_Cheetah:
    How the Processor will know that through which protocol it has to communicate.. or u have to set it manually..?? secondly are the future processor of intel are going to have same pin count..?? and lastly... doesn;t it increase the Power consumption of the Motherboard... with xtra chipset..??

    1. As Moridin said, the FSB protocol is built into the logic of the processor.

    2. In the foreseeable future, Intel will have three different CPU sockets (and associated pin counts): socket 603 for server/workstation (Foster, Prestonia, etc), socket 478 for mainstream (Pentium 4, Northwood, etc), and socket 370 for Pentium III (including Tualatin), which will stick around in the value, mobile, and high density server markets.

    3. Everything in the future will have higher power. Much is being done to escape this inevitable brick wall.

    By Arcadian July 06, 2001, 06:43 PM

    quote:Originally posted by Moridin:
    So you can have systems with completely different nortbridges and southbridges that are still considered the same chipset. This is actually a little funny since these are the two main parts of a chipset.

    I guess I can kind of see the logic though. From a system level you can treat both parts as black boxes where you do not care what goes on inside. All you care about is how they interact with each other, and that doesn't change.

    It may not make sense to you now, since you are so used to commercial chipsets containing one or two physical chips (northbridge and southbridge). You will find that i870 takes a large departure from this common design implementation. I can think of one configuration that has as many as 22 chips in the system, so it doesn't make sense to call it a different chipset if only 1 or 2 chips need to be changed to move to a different front side bus protocol. Stay tuned for more info, possibly at Fall IDF.


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