The first generation of Itanium processors will come in the first half of 2001 at 733MHz and 800MHz. The first generation's clock speed may not be particularly quick, but Intel has several generations ahead of the Itanium already in the works that should increase performance. Intel claims they have plenty of clock headroom in the Itanium design and are aiming for a greater than 1GHz clock speed with their second generation Itanium processor, McKinley, which will have the L3 cache on-die.

The Itanium was not designed for small systems, it is intended for 1 to 4000 processor workstations and servers. There are several Itanium features designed to help with hardware scalability: a full-CPU-speed Level 2 bus, a large L3 cache, deferred-transaction support and flexible page sizes.

The full-CPU-speed Level 3 bus provides quick communication between CPUs. The large L2 cache reduces inter-CPU bus traffic by keeping data close to the CPU that needs it. Deferred-transaction support can stop one CPU from getting in the way of another. Flexible page sizes, from 4KB to 256MB, give the Itanium family the flexibility to access small amounts of memory in small chunks and massive amounts of memory in massive chunks without the overhead of smaller page sizes.

The first generation Itanium chipset, the 460GX, will support up to four processors, and OEMs will be able to build eight-way and larger systems. Successive generations of chipsets should be successively more scalable. Third party solutions should also increase scalability.

The Itanium will have extensive error handling capabilities. It features ECC and parity error checking on most processor caches and busses. If a machine error occurs and a piece of data becomes corrupted, the ECC or parity checking will allow the machine to recognize the error, fix it if possible, or flag it as corrupted. The processor also has the capability to kill an application or thread that has experienced a machine error without having to reboot.

Chipset, OS, and system designers, which will include the likes of HP, IBM, Compaq, SGI, Microsoft and Intel, will bring out their own error handling and reliability processes that should further enhance Itanium-based server uptime to 99.9% and beyond.