At .18-micron, the 800's core not only generates less heat (make note overclockers) but it also lowers the amount of power needed in comparison to the first line of Athlons (500-700MHz). Some of the early Athlon adopters experienced problems with various motherboards/power supplies not providing the correct current. The K75 core solves most of these problems (but we still recommend using a 300 watt power supply). Essentially, think of the Athlon 800 as a higher clocked 750 except in one regard.
The 800 sports 512K off-die L2 cache, which is really the only Achilles heel that the CPU possesses. Unfortunately for the Athlon, once AMD got to 700MHz, the cache clocked at 350MHz (half the speed of the processor's core), reached a technological limit. Hence, for the Athlon 750, AMD changed the L2 cache divider from 1:2 to a 1:2.5 ratio dubbed "Pluto 2.5" resulting in the cache running at 300MHz. Likewise, the same "Pluto 2.5" ratio was utilized for the 800, so the cache is clocked at 325MHz. The 128K of L1 cache does however operate at the Athlon 800's full core speed as expected.
According to their older roadmaps, AMD had originally planned their transition from .25-micron to .18-micron to be a little different. The off-die L2 cache was due to be scrapped in favor of full-speed on-die cache for the 750MHz. But the 800, just like the 750 before it, still sports a similar set up of the off-die L2 cache, which has to be slowed down in order for the Athlon to be able to cope at higher clock speeds.
How much longer will AMD continue to release Athlon's with off-die L2 cache is a good question and the answer lies within the architecture's limitations. For maximum bandwidth, a good solution is to implement two full-speed parallel caches (the L1 and L2) for the CPU to access in tandem. AMD's Comdex presentation clearly shows that their intentions are along these lines via a 1 to 2MB on-die L2 full-speed cache (16-way associative L2 cache) implementation. Once AMD achieves this, Intel's full speed cache advantage (not to mention Intel's 256-bit datapath with a six-cycle latency) will be put the test.
If AMD's current plans time-out well, you'll likely see .18-micron Athlons with on-die cache, copper interconnects , with VIA KX-133 and PC-133 harboring AGP 4X support (won't it be great to put those GeForce's to the test?) by Q2 of 2000. FAB 30 in Dresden and its much talked-about copper interconnect wafer fabrication facility holds the key to that. AMD formed a strategic alliance with Motorola's Semiconductor Products Sector and licensed its current copper interconnect technology and High Performance Logic Process (HiPerMos) for this purpose. If we were to wager money on it, we'd expect to see Athlon's approaching the 1GHz mark by Q3 via their soon to be released K75 'Thunderbird' core (due out in Q2 2000).