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- PC Buyer's Guide for Gaming Enthusiasts -- January 2012
- PC Buyer's Guide for Entry-Level Gaming -- January 2012
- Build Your Own Gaming PC Guide -- Nov. 2011
- PC Buyer's Guide for Gaming Enthusiasts, August, 2011
- July Entry-Level Gaming PC Guide

Buyer's Guides

- PC Buyer's Guide for Entry-Level Gaming -- January 2012
- Build Your Own Gaming PC Guide -- Nov. 2011
- February High-end Gaming PC Buyer's Guide
- November Value Gaming PC Buyer's Guide
- September Extreme Gaming PC Buyer's Guide

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  • The CPU contains 25 million transistors and takes up 100mm˛ of die space. In comparison, the Thunderbird contains 37 million transistors and takes up 120mm˛ of die space. The Duron is being manufactured on a .18 micron aluminum interconnect process at AMD's Fab 25 in Austin, Texas. This is alongside AMD's aluminum Thunderbirds. Like the AMD Thunderbird, the Duron will use the new Socket A form factor. Socket A is less expensive than Slot A to manufacture, and also allows more flexible system designs. There will be no Slot A Duron at all so you will not be able to use a VIA KX133 based motherboard with the Duron. Socket A is comparable to Intel's Socket 370 FC-PGA connector.

    The Duron has a thoroughly modern CPU core design that leverages much of the AMD Thunderbird's technology. It sports 64K of L1 data cache, 64K of L1 instruction cache, three independent integer pipelines, three address calculation pipelines, and a fully pipelined, out-of-order, three-way floating-point engine. The actual silicon layout is different for the Duron and Thunderbird, but from an end user's perspective, the Duron and Athlon core are functionally identical.

    The Celeron sports only 16K of L1 data and 16K of L1 instruction cache. Four times the L1 cache is nothing to sneeze about, and can lead to a massive performance boost. At the same time, the large amount of L1 cache may be responsible for the Duron's relatively high power usage.

    The Duron sports 64K of full speed 16-way set-associative L2 cache. Essentially, the purpose of associativity is to reduce cache conflicts in hardware rather than software, where a programmer would have to address these conflicts, which is ideal but not practical. For unoptimized programs, set-associative caches increase the cache "hit" rate and can reduce execution time, especially in multithreaded applications. By adding various other features, such as redundant columns (ensures cache integrity), and more write back and fill buffers (reduces the chance of the processor waiting for data and stalling), AMD has ensured that the Athlon is well optimized for heavy bandwidth loads.





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